1. Field of the Invention
This invention relates to capacitor mounting structures for capacitors of multilayer printed circuit boards, and more particularly to a low inductance capacitor mounting structure.
2. Description of the Related Art
As operating speeds and current densities increase for digital systems, noise has become an increasingly important concern. One source of high-frequency noise in digital systems is the parasitic inductance of a capacitor mounting structure for capacitors of printed circuit boards in such systems. One source of parasitic inductance has been the specific region bounded and defined by a bottom surface of a capacitor, a capacitor surface or solder pad, and vias of a capacitor mounting structure. This type of parasitic inductance is described in Stoddard, commonly-owned U.S. Pat. Nos. 5,375,035 and 5,459,642, of which Applicant in inventor. Other regions of a capacitor mounting structure, however, continue to provide parasitic inductance.
Certain of these regions are associated with the vias of a capacitor mounting structure. A via is an electrically conductive path through a substrate dielectric layer which connects solder pads to a power or ground conductor plane of a printed circuit board. When current is provided through the vias, the vias produce a magnetic filed forming a magnetic circuit around the vias. So far as is known, conventional efforts to reduce inductance of these regions have been unsuccessful. Such efforts have included either increasing the diameter of vias or providing a capacitor terminal for each via. Another approach to minimizing capacitor inductance has been to confine the magnetic field within a capacitor. This approach, however, has typically included providing vias outside the area where soldering occurs to avoid placing solder within a via. Traces between the capacitor body and the vias have provided a high inductance.
Further, another region providing parasitic inductance is associated with the capacitor body and the solder pads. The high inductance of certain regions of a capacitor mounting structure has inhibited capacitor response at high frequencies and caused retention of noise in printed circuit boards.